Publications in journals

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[LMC+24]
Lorenzo Lagostina, Filippo Minella, Jordi Cortadella, Mario R. Casu, Mihai T. Lazarescu, and Luciano Lavagno. Mix & Latch: Comparison With State-of-the-Art Retiming On a RISC-V Benchmark. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024. [ bib | DOI | URL ]
[TCV23]
Viktor Teren, Jordi Cortadella, and Tiziano Villa. Generation of synchronizing state machines from a transition system: a region-based approach. International Journal of Applied Mathematics & Computer Science, 33(1):133--149, 2023. [ bib | DOI ]
[MCC+23]
Filippo Minella, Jordi Cortadella, Mario R. Casu, Mihai T. Lazarescu, and Luciano Lavagno. Mix & Latch: An Optimization Flow for High-Performance Designs with Single-Clock Mixed-Polarity Latches and Flip-Flops. IEEE Access, 2023. [ bib | DOI | URL ]
[SLC+22]
Junnan Shan, Mihai T. Lazarescu, Jordi Cortadella, Luciano Lavagno, and Mario R. Casu. Fast Energy-Optimal Multi-Kernel DNN-like Application Allocation on Multi-FPGA Platforms. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 41(4):1186--1190, 2022. [ bib | DOI | URL ]
[VOCP+21]
Alex Vidal-Obiols, Jordi Cortadella, Jordi Petit, Marc Galceran-Oms, and Ferran Martorell. Multi-level dataflow-driven macro placement guided by RTL structure and analytical methods. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 40(12):2542--2555, December 2021. [ bib | DOI | URL ]
[JSG+21]
Lana Josipović, Shabnam Sheikha, Andrea Guerrieri, Paolo Ienne, and Jordi Cortadella. Buffer Placement and Sizing for High-Performance Dataflow Circuits. ACM Transactions on Reconfigurable Technology and Systems, 4(1), November 2021. Article 4. [ bib | DOI | PDF ]
[SLC+21]
Junnan Shan, Mihai T. Lazarescu, Jordi Cortadella, Luciano Lavagno, and Mario R. Casu. CNN-on-AWS: Efficient Allocation of Multi-Kernel Applications on Multi-FPGA Platforms. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 40(2):301--314, 2021. [ bib | DOI | URL ]
[MC20]
Lucas Machado and Jordi Cortadella. Support-Reducing Decomposition for FPGA Mapping. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 39(1):213--224, January 2020. [ bib | DOI | URL ]
[SLC+20]
Junnan Shan, Mihai T. Lazarescu, Jordi Cortadella, Luciano Lavagno, and Mario R. Casu. Power-Optimal Mapping of CNN Applications to Cloud-Based Multi-FPGA Platforms. IEEE Transactions on Circuits and Systems II, 67(12):3073--3077, 2020. [ bib | DOI | URL ]
[SCGV20]
Juan Segarra, Jordi Cortadella, Rubén Gran Tejero, and Víctor Viñals. Automatic safe data reuse detection for the WCET analysis of systems with data caches. IEEE Access, 8:192379--192392, 2020. [ bib | DOI | URL ]
[MRC19]
Lucas Machado, Antoni Roca, and Jordi Cortadella. Robustness to Voltage Noise with Ring Oscillator Clocks. IEEE Transactions on Nanotechnology, 18(1):374--384, April 2019. [ bib | DOI ]
[MC18]
Alberto Moreno and Jordi Cortadella. State-based encoding of large asynchronous controllers. IEEE Access, 6:61503--61518, September 2018. [ bib | DOI | URL ]
[PRC+17]
Jordi Petit, Salvador Roura, Josep Carmona, Jordi Cortadella, Amalia Duch, Omer Giménez, Anaga Mani, Jan Mas, Enric Rodríguez-Carbonell, Albert Rubio, Javier de San Pedro, and Divya Venkataramani. Jutge.org: Characteristics and Experiences. IEEE Transactions on Learning Technologies, 11(3):321--333, July-Sept 2017. [ bib | DOI ]
[JCS16]
Palkesh Jain, Jordi Cortadella, and Sachin S. Sapatnekar. A Fast and Retargetable Framework for Logic-IP-Internal Electromigration Assessment Comprehending Advanced Waveform Effects. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 24(6):2345--2358, 2016. [ bib | DOI ]
[CGOKS15]
Jordi Cortadella, Marc Galceran-Oms, Mike Kishinevsky, and Sachin S. Sapatnekar. RTL synthesis: from logic synthesis to automatic pipelining. Proceedings of the IEEE, 103(11):2061--2075, November 2015. [ bib | DOI | URL ]
[CBC+15]
Marco Cannizzaro, Salomon Beer, Jordi Cortadella, Ran Ginosar, and Luciano Lavagno. SafeRazor: Metastability-robust adaptive clocking in resilient circuits. IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, 62(9):2238--2247, September 2015. [ bib | DOI | URL ]
[CC14]
Josep Carmona and Jordi Cortadella. Process Discovery Algorithms using Numerical Abstract Domains. IEEE Transactions on Knowledge and Data Engineering, 26(12):3064--3076, December 2014. [ bib | DOI | PDF ]
[CPGM14]
Jordi Cortadella, Jordi Petit, Sergio Gómez, and Francesc Moll. A Boolean Rule-Based Approach for Manufacturability-Aware Cell Routing. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 33(3):409--422, March 2014. [ bib | DOI | PDF ]
[Cor13]
Jordi Cortadella. Area-Optimal Transistor Folding for 1-D Gridded Cell Design. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 32(11):1708--1721, November 2013. [ bib | DOI | PDF ]
[NdSPC13]
Nikita Nikitin, Javier de San Pedro, and Jordi Cortadella. Architectural Exploration of Large-Scale Hierarchical Chip Multiprocessors. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 32(10):1569--1582, October 2013. [ bib | DOI | PDF ]
[PLC+13]
Ferdinand Peper, Jia Lee, Josep Carmona, Jordi Cortadella, and Kenichi Morita. Brownian Circuits: Fundamentals. ACM Journal on Emerging Technologies in Computing Systems, 9(1):3:1--3:24, February 2013. [ bib | DOI | PDF ]
[GOGCK11]
Marc Galceran-Oms, Alexander Gotmanov, Jordi Cortadella, and Mike Kishinevsky. Microarchitectural Transformations Using Elasticity. ACM Journal on Emerging Technologies in Computing Systems, 7(4):18:1--18:24, December 2011. [ bib | DOI | PDF ]
[CJCK11]
Josep Carmona, Jorge Júlvez, Jordi Cortadella, and Michael Kishinevsky. A scheduling strategy for synchronous elastic designs. Fundamenta Informaticae, 108(1-2):1--21, 2011. [ bib | DOI ]
[JCK10]
Jorge Júlvez, Jordi Cortadella, and Michael Kishinevsky. On the performance evaluation of multi-guarded marked graphs with single-server semantics. Discrete Event Dynamic Systems, 20(3):377--407, September 2010. [ bib | DOI ]
[CCK10]
Josep Carmona, Jordi Cortadella, and Mike Kishinevsky. New region-based algorithms for deriving bounded Petri nets. IEEE Transactions on Computers, 59(3):371--384, March 2010. [ bib | DOI ]
[CCKT09]
Josep Carmona, Jordi Cortadella, Mike Kishinevsky, and Alexander Taubin. Elastic circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 28(10):1437--1455, October 2009. [ bib | DOI | PDF ]
[CT09]
Jordi Cortadella and Alexander Taubin. Guest editorial: Special section on asynchronous circuits and systems. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 17(7):853--854, July 2009. [ bib | DOI ]
[BCK09]
David Bañeres, Jordi Cortadella, and Mike Kishinevsky. A recursive paradigm to solve Boolean relations. IEEE Transactions on Computers, 58(4):512--527, April 2009. [ bib | DOI ]
[CKB+08]
Jordi Cortadella, Michael Kishinevsky, Dmitry Bufistov, Josep Carmona, and Jorge Júlvez. Elasticity and Petri Nets. Transactions on Petri Nets and Other Models of Concurrency I, 5100:221--249, August 2008. [ bib | DOI ]
[CC08]
Josep Carmona and Jordi Cortadella. Encoding large asynchronous controllers with ILP techniques. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 27(1):20--33, January 2008. [ bib | DOI | PDF ]
[CCTP08]
Josep Carmona, Jordi Cortadella, Yousuke Takada, and Ferdinand Peper. Formal methods for the analysis and synthesis of nanometer-scale cellular arrays. ACM Journal on Emerging Technologies in Computing Systems, 4(2), 2008. [ bib | DOI ]
[CC07a]
Robert Clarisó and Jordi Cortadella. The octahedron abstract domain. Science of Computer Programming, 64(1):115--139, January 2007. [ bib | DOI | PDF ]
[GCXY07]
Kyller Costa Gorgônio, Jordi Cortadella, Fei Xia, and Alexandre Yakovlev. Automating synthesis of asynchronous communication mechanisms. Fundamenta Informaticae, 78(1):75--100, 2007. [ bib ]
[CC07b]
Robert Clarisó and Jordi Cortadella. Verification of concurrent systems with parametric delays using octahedra. Fundamenta Informaticae, 78(1):1--33, 2007. [ bib ]
[TCL+07]
Alexander Taubin, Jordi Cortadella, Luciano Lavagno, Alex Kondratyev, and Ad Peeters. Design automation of real life asynchronous devices and systems. Foundations and Trends in Electronic Design Automation, 2(1):1--133, 2007. [ bib | DOI ]
[CKLS06]
Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, and Christos Sotiriou. Desynchronization: Synthesis of asynchronous circuits from synchronous specifications. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 25(10):1904--1921, October 2006. [ bib | DOI | PDF ]
[CCCGV06]
Josep Carmona, José M. Colom, Jordi Cortadella, and Fernando García-Vallés. Synthesis of asynchronous controllers using integer linear programming. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 25(9):1637--1651, September 2006. [ bib | DOI | PDF ]
[CKL+05]
Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Claudio Passerone, and Yosinori Watanabe. Quasi-static scheduling of independent tasks for reactive systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 24(10):1492--1514, October 2005. [ bib | DOI | PDF ]
[CKL+04]
Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, and Yosinori Watanabe. Quasi-static scheduling for concurrent architectures. Fundamenta Informaticae, 62(2):171--196, July 2004. [ bib ]
[Cor03]
Jordi Cortadella. Timing-driven logic bi-decomposition. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 22(6):675--685, June 2003. [ bib | DOI | PDF ]
[SKC+02]
Hiroshi Saito, Alex Kondratyev, Jordi Cortadella, Luciano Lavagno, Takashi Nanya, and Alexander Yakovlev. Design of asynchronous controllers with delay insensitive interface. IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E85-A(12):2577--2585, December 2002. [ bib | PDF ]
[CCP02]
Josep Carmona, Jordi Cortadella, and Enric Pastor. A structural encoding technique for the synthesis of asynchronous circuits. Fundamenta Informaticae, 50(2):135--154, March 2002. [ bib | PDF ]
[CKB+02]
Jordi Cortadella, Michael Kishinevsky, Steve M. Burns, Alex Kondratyev, Luciano Lavagno, Ken S. Stevens, Alexander Taubin, and Alexandre Yakovlev. Lazy transition systems and asynchronous circuit synthesis with relative timing assumptions. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 21(2):109--130, February 2002. [ bib | DOI | PDF ]
[PCR01]
Enric Pastor, Jordi Cortadella, and Oriol Roig. Symbolic analysis of bounded Petri nets. IEEE Transactions on Computers, 50(5):432--448, May 2001. [ bib | DOI | PDF ]
[CKK+99]
Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Enric Pastor, and Alexandre Yakovlev. Decomposition and technology mapping of speed-independent circuits using Boolean relations. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 18(9):1221--1236, September 1999. [ bib | DOI | PDF ]
[KCK+99]
Alex Kondratyev, Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, and Alexander Yakovlev. Logic decomposition of speed-independent circuits. Proceedings of the IEEE, 87(2):347--362, February 1999. [ bib | DOI | PDF ]
[SC99]
Fermín Sánchez and Jordi Cortadella. Optimal exploration of the unrolling degree for software pipelining. Journal of Systems Architecture, 45(6--7):505--517, 1999. [ bib | PS ]
[MLC98]
Enric Musoll, Tomás Lang, and Jordi Cortadella. Working-zone encoding for reducing the energy in microprocessor address buses. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 6(4):568--572, December 1998. [ bib | DOI | PDF ]
[PCKR98]
Enric Pastor, Jordi Cortadella, Alex Kondratyev, and Oriol Roig. Structural methods for the synthesis of speed-independent circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 17(11):1108--1129, November 1998. [ bib | DOI | PDF ]
[CKLY98]
Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, and Alexandre Yakovlev. Deriving Petri nets from finite transition systems. IEEE Transactions on Computers, 47(8):859--882, August 1998. [ bib | DOI | PDF ]
[SC98]
Fermín Sánchez and Jordi Cortadella. Reducing register pressure in software pipelining. Journal of Information Science and Engineering (special issue on Compiler Techniques for High-Performace Computing), 14(1):265--279, March 1998. [ bib ]
[KKT+98]
A. Kondratyev, M. Kishinevsky, A. Taubin, J. Cortadella, and L. Lavagno. The use of Petri nets for the design and verification of asynchronous circuits and systems. Journal of Circuits Systems and Computers, 8(1):67--118, 1998. [ bib | PS ]
[MC98]
Enric Musoll and Jordi Cortadella. Register-transfer level transformations for low-power data-paths. Integrated Computer-Aided Engineering, 5(4):315--332, 1998. [ bib ]
[CKK+97]
Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, and Alexandre Yakovlev. A region-based theory for state assignment in speed-independent circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 16(8):793--812, August 1997. [ bib | DOI | PDF ]
[LMC97]
Tomás Lang, Enric Musoll, and Jordi Cortadella. Individual flip-flops with gated clocks for low-power datapaths. IEEE Transactions on Circuits and Systems II, 44(6):507--516, June 1997. [ bib | DOI | PDF ]
[CKA+97]
J. Cortadella, M. Kishinevsky, A.Kondratyev, L. Lavagno, and A. Yakovlev. Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers. IEICE Transactions on Information and Systems, E80-D(3):315--325, March 1997. [ bib | PDF ]
[CL94]
Jordi Cortadella and Tomás Lang. High-radix division and square root with speculation. IEEE Transactions on Computers, 43(8):919--931, August 1994. [ bib | DOI | PDF ]
[BC93]
Rosa M. Badia and Jordi Cortadella. GLASS: a graph-theoretic approach for global binding. Microprocessing and Microprogramming, 38(1--5):775--782, September 1993. [ bib | PS ]
[SC93]
Fermín Sánchez and Jordi Cortadella. Resource-constrained pipelining based on loop transformations. Microprocessing and Microprogramming, 38(1--5):429--436, September 1993. [ bib | PDF ]
[CL92]
Jordi Cortadella and José M. Llabería. Evaluation of A+B=K conditions without carry propagation. IEEE Transactions on Computers, 41(11):1484--1488, November 1992. [ bib | DOI | PDF ]
[CJ92]
Jordi Cortadella and Teodor Jové. Comments on ”Using Cache Mechanisms to Exploit non-Refreshing DRAM's for On-Chip Memories”. IEEE Journal of Solid-State Circuits, 27(1):132, January 1992. [ bib | DOI | PDF ]
[CBA91]
Jordi Cortadella, Rosa M. Badia, and Eduard Ayguadé. Scheduling in a continuous area-time design space. Microprocessing and Microprogramming, 32(1--5):199--206, August 1991. [ bib ]
[JC89]
Teodor Jové and Jordi Cortadella. Reduced instruction buffer for RISC architectures. Microprocessing and Microprogramming, 27(1--5):1987--1993, August 1989. [ bib ]
[CL89]
Jordi Cortadella and José M. Llabería. Making branches transparent to the execution unit. International Journal of Mini and Microcomputers, 11(1):13--17, January 1989. [ bib ]
[CJ88b]
Jordi Cortadella and Teodor Jové. Dynamic RAM for on-chip instruction caches. Computer Architecture News, 16(4):45--50, September 1988. [ bib ]
[CJ88a]
Jordi Cortadella and Teodor Jové. Designing a branch target buffer for executing branches with zero time cost in a RISC processor. Microprocessing and Microprogramming, 24(1--5):573--580, August 1988. [ bib ]
[GLC88]
Antonio González, José M. Llabería, and Jordi Cortadella. A mechanism for reducing the cost of branches in RISC architectures. Microprocessing and Microprogramming, 24(1--5):565--572, August 1988. [ bib ]
[CGL88]
Jordi Cortadella, Antonio González, and José M. Llabería. RISC: un nuevo enfoque en el diseño de procesadores. Mundo electrónico, 180:49--57, January 1988. [ bib ]

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